ADLINK Technology ACL -6128 User's Guide

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NuDAQ
ACL-8316/8312
16/12-bit High Performance
DAS Cards with 1K FIFO
User’s Guide
Recycled Paper
Page view 0
1 2 3 4 5 6 ... 78 79

Summary of Contents

Page 1 - User’s Guide

NuDAQ ACL-8316/8312 16/12-bit High Performance DAS Cards with 1K FIFO User’s Guide Recycled Paper

Page 2

2  Introduction CH 0CH 1CH 2...>16 BITDIGITAL INPUTREGISTERDI 0DI 1DO 15DO 0DO 1DI 15DMA SELECT5, 6, 7TRIGLOGICPACERTRIGSOFTWARETRIGEXTERNALTRI

Page 3 - Getting service from ADLINK

Introduction  3 1.1 Features The ACL-8316/12 high performance and high resolution Data Acquisition Card provides the following advanced features: z

Page 4

4  Introduction 1.3 Specifications  Analog Input (A/D) z Converter: ADS7805 or equivalent for ACL-8316 ADS7804 or equivalent for ACL-8312 z Re

Page 5 - Table of Contents

Introduction  5  Digital I/O ( DIO) z Channel: 16 TTL compatible inputs and outputs z Input Voltage: Low: Min. 0V ; Max. 0.8V High: Min. +

Page 6

6  Introduction 1.4 Software Support 1.4.1 Programming Library For the customers who are writing their own programs, we provide MS-DOS Borland C/C+

Page 7 - Table of Contents  iii

Installation  7 2 Installation This chapter describes how to install the ACL-8316/12. At first, the contents in the package and unpacking information

Page 8 - How to Use This Guide

8  Installation After opening the card module carton, extract the system module and place it only on a grounded anti-static surface component side up

Page 9 - Introduction

Installation  9 2.4 Jumper and DIP Switch Description You can change the ACL-8316/12's channels and the base address by setting jumpers and DIP

Page 10 - 2  Introduction

10  Installation I/O port Address(Hex) A9 1 A8 2 A7 3 A6 4 A5 5 A4 200-20F -- (1) ON (0) ON (0) ON (0) ON (0) ON (0) 210-21F -- (1) ON (0) ON (0)

Page 11 - 1.2 Applications

Installation  11 2.6 Analog Input Channel Configuration The ACL-8316/12 offer 16 single-ended or 8 differential analog input channels. The jumper JP

Page 12 - 1.3 Specifications

©Copyright 1996~2000 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 2.50: November 9, 2000 Product no: 50-11016-100 The information in

Page 13

12  Installation JP5BI1 UP1 JP5BI1 UP1 D/A CH1 Output-10V~+10V Bipolar (Default) D/A CH1 Output0V~10V Unipolar Figure 2.4 D/A CH1 Output Range sett

Page 14 - 1.4 Software Support

Installation  13 Transprant d(default tti )JP1 DBTPDouble Bff dmodJP1 DBTP Figure 2.6 D/A Output Mode Setting

Page 15 - Installation

14  Installation 2.8 DMA Channel Setting The A/D data transfer of ACL-8316/12 is designed with DMA transfer capability. The setting of DMA channel 5

Page 16

Installation  15 Figure 2.8 IRQ Level Setting 2.10 Clock Source Setting The 8254 programmable interval timer is used in the ACL-8316/12. It provide

Page 17 - 2.5 Base Address Setting

16  Installation 2.11 Connectors Pin Assignment The ACL-8316/12 comes equipped with two 20-pin insulation displacement connectors - CN1 and CN2 and

Page 18

Installation  17 z CN 3: Analog Input/Output & Counter/Timer ( for single-ended connection) AI21234567891011121314151617181921 22 23 24 25 26 2

Page 19

18  Installation Legend: Ain : Analog Input Channel n ( single-ended) AIHn : Analog High Input Channel n ( differential) AILn : Analog Low Input

Page 20 - 2.7.2 Output Mode Setting

Installation  19 2.12 Daughter Board Connection The ACL-8316/12 can be connected with five different daughter boards, ACLD-8125, ACLD-9137, 9182, 91

Page 21 - Installation  13

20  Registers Format 3 Registers Format The detailed description of the ACL-8316/12‘s register format is specified in this chapter. This information

Page 22 - 2.9 IRQ Level Setting

Registers Format  21 Note: The ACL-8316/12 includes both 8 bits & 16 bits I/O ports. The AD Data, DA channels, and digital I/O ports are 16 bits

Page 23 - 2.10 Clock Source Setting

Getting service from ADLINK Customer Satisfaction is always the most important thing for ADLINK Tech Inc. If you need any help or service, please con

Page 24 - Legend:

22  Registers Format 3.3 FIFO Enable Register The FF_ENA bit directly control FIFO memory. Clear FF_ENA bit to ‘0’ can always reset the FIFO and any

Page 25 - Installation  17

Registers Format  23 3.5 A/D Channel Multiplexer Register The A/D channel multiplexer register is used to select the A/D channel under normal mode,

Page 26 - 18  Installation

24  Registers Format 3.6 Interrupt Source Control Register The interrupt source of ACL-8316 is controlled by both of this register and the A/D mode

Page 27 - Installation  19

Registers Format  25 3.7 AD Mode Control Register The A/D mode control register is used to select A/D data transfer mode A/D trigger source, and A/D

Page 28 - Registers Format

26  Registers Format 3.8 A/D Status Register Address : BASE + 8 Attribute : read only Data Format: Bit 7 6 5 4 3 2 1 0 AD_BUSY FF-FF FF_

Page 29 - 3.2 A/D Data Registers

Registers Format  27 3.9 Clear Interrupt Register To read this port can generate clear interrupt signal. No matter which interrupt source is used,

Page 30 - 3.4 Gain Control Register

28  Registers Format 3.12 DA Mode Control Register Address : BASE + 13 Attribute : write Data Format: Bit 7 6 5 4 3 2 1 0 X X X X X X DA_

Page 31 - Data Format:

Registers Format  29 3.13 Digital I/O register There are 16 digital input channels and 16 digital output channels are provided by the ACL-8312/16. T

Page 32 -  Registers Format

30  Operation Theorem 4 Operation Theorem The operation theorem of the functions on ACL-8316/12 card is described in this chapter. The functions in

Page 33 - Attribute : read and write

Operation Theorem  31 4.1.1 A/D Conversion Procedure For using the A/D converter, users must know about the property of the signal to be measured at

Page 35 - 3.11 DA Data Registers

32  Operation Theorem single-ended connection. Note that when more than two floating sources are connected, the sources must be with common ground.

Page 36

Operation Theorem  33 A differential mode must be used when the signal source is differential. A differential source means the ends of the signal are

Page 37 - 3.13 Digital I/O register

34  Operation Theorem Signal Channel There are 16 channels in SE mode and 8 channels in DI mode. There are two ways to control the channel number.

Page 38 - Operation Theorem

Operation Theorem  35 4.1.3 A/D Trigger Sources Control The A/D conversion is started by trigger signal. There are total three trigger sources in t

Page 39 - Operation Theorem  31

36  Operation Theorem 4.1.4 A/D Data Buffering On the ACL-8316, the AD data will store in the A/D data register. While A/D conversion, the register

Page 40 - 32  Operation Theorem

Operation Theorem  37 4.1.5 A/D Data Transfer Modes The A/D data must be transferred to CPU for processing. On the ACL-8316, many AD data transfer

Page 41 - Operation Theorem  33

38  Operation Theorem FIFO Half-Full Interrupt Transfer By properly programming the interrupt control register, the ACL-8316 provides FIFO half-ful

Page 42 - 34  Operation Theorem

Operation Theorem  39 4.1.6 A/D Data Format The A/D data read either from A/D data port or the FIFO port is in the two‘s complement format. As the

Page 43 - Operation Theorem  35

40  Operation Theorem where the gain is the value of the A/D gain control register. The K is a coefficient. For ACL-8316, K=32767; for ACL-8312, K=

Page 44 - 4.1.4 A/D Data Buffering

Operation Theorem  41 4.2 Interrupt System The interrupt system of the ACL-8316/12 is very flexible for many applications. There are four plus one (

Page 45 - Operation Theorem  37

Table of Contents  i Table of Contents Chapter 1 Introduction ... 1 1.1 Features ...

Page 46 - 38  Operation Theorem

42  Operation Theorem 4.3 D/A Conversion The ACL-8316/12 has two unipolar analog output channels. To make the D/A output connections from the approp

Page 47 - Voltage AD data

Operation Theorem  43 Note that the two D/A channels could be in double buffered mode or in the transparency mode. In the transparency mode, the ope

Page 48 - 40  Operation Theorem

44  Operation Theorem 4.4 Digital Input and Output The ACL-8316/12 provides 16 digital input and 16 digital output channels through the connector CN

Page 49 - 4.2 Interrupt System

Operation Theorem  45 4.5 Timer/Counter Operation The ACL-8316/12 has an 8254 programmable interval timer/counter on board. It offers 3 independent 1

Page 50 - VrefVout 

46  Operation Theorem Pacer Trigger Source The counter 1 and counter 2 are cascaded together to generate the timer pacer trigger of A/D conversion.

Page 51 - Operation Theorem  43

Operation Theorem  47 z RL1 & RL0 - Select Read/Load operation ( Bit 5 & Bit 4) RL1 RL0 OPERATION 0 0 COUNTER LATCH FOR STABLE READ 0 1 RE

Page 52 - 44  Operation Theorem

48  C/C++ Library 5 C/C++ Library This chapter describes the DOS software library, which is free supplied. The DOS library software includes a utilit

Page 53 - 4.5 Timer/Counter Operation

C/C++ Library  49 5.2 Software Utility The ACL-8316/12‘s Utility includes System Configuration, Calibration, and Functional Testing. This utility so

Page 54 - 46  Operation Theorem

50  C/C++ Library 5.4 _8316_Initial @ Description An ACL-8316/12 card is initialized according to the card number and the corresponding base address.

Page 55 - Operation Theorem  47

C/C++ Library  51 5.6 _8316_DI @ Description This function is used to read data from digital input port. There are 16-bit digital inputs on the ACL

Page 56 - C/C++ Library

ii  Table of Contents 3.9 Clear Interrupt Register...27 3.10 Software A/D Trigger Register...

Page 57 - 5.3 Programming Guide

52  C/C++ Library 5.8 _8316_DO @ Description This function is used to write data to digital output port. There are 16 digital outputs on the ACL-8

Page 58 - 5.5 _8316_Switch_Card_No

C/C++ Library  53 5.10 _8316_DA_Set_Mode @ Description This function is used to configure the D/A output mode . There are four modes can be set wh

Page 59 - 5.7 _8316_DI _Channel

54  C/C++ Library 5.11 _8316_DA @ Description This function is used to write data to D/A converters. There are two Digital-to-Analog conversion ch

Page 60 - 5.9 _8316_DO_Channel

C/C++ Library  55 @ Argument ad_ch_no: channel number to perform AD conversion for single-ended mode: channel no. is from 0-15 for differential mo

Page 61 - 5.10 _8316_DA_Set_Mode

56  C/C++ Library 5.14 _8316_AD_Set_Mode @ Description This function is used to set the A/D trigger source, A/D channel selection and A/D data tran

Page 62 - 5.12 _8316_AD_Set_Channel

C/C++ Library  57 5.16 _8316_AD_Set_FIFO @ Description This function is used to enable the FIFO on the ACL-8312/15. As the FIFO is enabled, all A/D

Page 63 - 5.13 _8316_AD_Range

58  C/C++ Library 5.18 _8316_CLR_IRQ @ Description This function is used to clear interrupt request which requested by the ACL-8316/12. If you use

Page 64 - 5.15 _8316_AD_Set_Autoscan

C/C++ Library  59 5.20 _8316_AD_Read_FIFO @ Description This function is used to get the AD conversion data which are stored in the FIFO. This func

Page 65 - 5.17 _8316_AD_Set_INT_Source

60  C/C++ Library 5.22 _8316_AD_DMA_Start @ Description The function will perform A/D conversion N times with DMA data transfer by using the pacer

Page 66 - 5.19 _8316_AD_Soft_Trig

C/C++ Library  61 irq_ch_no: IRQ channel number, used to stop DMA Note: Make sure your hardware configuration is set to right IRQ interrupt level.

Page 67 - 5.21 _8316_AD_Aquire

Table of Contents  iii 5.21 _8316_AD_Aquire...59 5.22 _8316_AD_DMA_Start ...

Page 68 - 5.22 _8316_AD_DMA_Start

62  C/C++ Library 5.24 _8316_AD_DMA_Stop @ Description This function is used to stop the DMA data transferring. After executing this function, the

Page 69 - 5.23 _8316_AD_DMA_Status

C/C++ Library  63 @ Argument int_mode: A/D conversion by interrupt data transfer INT_MODE_0: Internal timer pacer trigger A/D conversion, EOC( e

Page 70 - 5.25 _8316_AD_INT_Start

64  C/C++ Library 5.26 _8316_AD_INT_Status @ Description Since the _8316_AD_INT_Start() function is executed in background, you can issue the funct

Page 71 - C/C++ Library  63

C/C++ Library  65 5.28 _8316_AD_Timer @ Description This function is used to setup the Timer #1 and Timer #2. Timer #1 & #2 are used as freque

Page 72 - 5.27 _8316_AD_INT_Stop

66  C/C++ Library 5.30 _8316_TIMER_Read @ Description This function is used to read the counter value of the Timer #0. @ Syntax I16 _8316_TIMER_

Page 73 - 5.29 _8316_TIMER_Start

Calibration & Utilities  67 6 Calibration & Utilities In data acquisition process, how to calibrate your measurement devices to maintain

Page 74 - 5.31 _8316_TIMER_Stop

68  Calibration & Utilities 6.2 VR Assignment There are five variable resistors (VR) on the ACL-8316/12 board to allow you making accurate adjust

Page 75 - 6.1 What do you need

Calibration & Utilities  69 6.4.2 DA Channel 2 Calibration 1. Set JP6 to BI1 (Bipolar for DA Channel 2). 2. Connect VDM (+) to CN3.AO2 pin-

Page 76 - 6.4 D/A Adjustment

70  Warranty Policy Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please

Page 77

Warranty Policy  71  Damage caused by leakage of battery fluid during or after change of batteries by customer/user.  Damage from improper repai

Page 78 - Warranty Policy

How to Use This Guide This manual is designed to help you use the ACL-8316/12. The manual describes how to modify various settings on the ACL-8316/12

Page 79 - Warranty Policy  71

Introduction  1 1 Introduction The ACL-8316/12 series DAS cards are high resolution and high performance data acquisition card based on the 16-bit PC

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