ADLINK Technology PCIe-FIW Series User Manual Page 27

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System Description 15
Matrix MXE-3000 Series
User’s Manual
For panels the inverter of which sets backlight to brightest when
backlight control pin is pulled high:
The backlight control pin shares voltage level with panel power pin
which should be consistent with the panel power requirements.
Suggested cable wiring is:
Pin # Signal Pin # Signal
1 C_LVD_A_DATA2_N 16 C_LDDC_CLKt
2 C_LVD_A_DATA2_P 17 C_LVD_A_DATA0_N
3 DGND 18 C_LVD_A_DATA0_P
4 DGND 19 DGND
5 D12V_EXT 20 DGND
6 N/A 21 T/S_S/XR
7 C_LBKLT_EN_DELAY 22 DGND
8 C_LDDC_DATA 23 C_LVD_A_CLK_P
9 C_LVD_A_DATA1_N 24 C_LVD_A_CLK_N
10 C_LVD_A_DATA1_P C1 T/S_H
11 DGND C2 T/S_X/XL
12
PANEL_PWR &
C_L_BRIGHTNESS (*)
C3 T/S_Y/YT
13 DGND C4 T/S_L/YB
14 PANEL_PWR C5
15 DGND
<12> Panel Power Pin & Backlight
Control Pin
Inverter backlight control / PWM
Inverter panel power - 1
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