ADLINK Technology cPCI-3920 Series User Manual download pdf (Page 29)

Functional Description 15

AMC-1000

3.3.1 PCI Express

The Intel 3100 Chipset provides one configurable x8 PCI

Express interface with a maximum theoretical bandwidth of 4

GByte/s. The x8 PCI Express interface may alternatively be

configured as two independent x4 PCI Express interfaces with

a maximum theoretical bandwidth of 2 GBytes/s each. The

Intel® 3100 Chipset also supports an additional x4 PCI

Express interface with a maximum theoretical bandwidth of 2

GBytes/s which may alternatively be configured as four inde-

pendent x1 PCI Express interfaces.

The AMC-1000 supports two PCI Express x4 interfaces from

the Intel® 3100 to the AMC connector. One PCI Express x4 is

directly connected to AMC ports 4~7, the other PCI Express x4

is connected to the PLX PEX8508 switch and then to AMC

ports 8~11. The PEX8508 is a fully non-blocking, low-latency,

low-cost, and low-power 5-port, 8-lance PCI Express switch

which enables a PCI Express x4 to be configured to 4 x1 lanes

for more flexible applications. See Onboard Switches, “PCI

Express Mode Switch (SWX3)” on page 27 for details.

3.3.2 IICH

I/O Controller Hub (IICH) functions are integrated into the Intel®

3100 Chipset, eliminating the requirement for a legacy I/O bridge.

I/O Controller Hub Feature set comprises:

X PCI Express Interface

X Low Pin Count (LPC) Interface

X Firmware Hub (FWH) Interface

X Integrated Serial ATA (SATA) Host Controllers:

Z Independent DMA operation on six ports

- Four ports in SATA 1.0a and AHCI mode

- Six ports in AHCI mode only

Z Data transfer rates up to 150 Mbyte/s

X Two controllers with up to four USB 2.0 ports:

Z One EHCI USB 2.0 Host Controller to support a total of

four ports (shared with the UHCI ports)

Z Two UHCI Host Controllers to support a total of four

ports (shared with the EHCI ports)

1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 95 96

No comments

ADLINK Technology cPCI-3920 Series User Manual Page 29