ADLINK Technology NuPRO-760 User's Guide

NuDAQ DAQ-2204/2205/2206 PXI-2204/2205/2206 64-CH, High Performance Multi-function Data Acquisition Cards User's Guide

vi • Figures Figure 25: Re-triggered waveform generation with Post-trigger and DLY2_Counter = 0... 44 Figure 26: Finite iterative

How to Use This Guide • vii How to Use This Guide This manual is designed to help you use/understand the DAQ/PXI-22XX. The manual des cribes the vers

Introduction • 1 1 Introduction The DAQ/PXI-22XX is an advanced data acquisition card based on the 32-bit PCI architecture. High performance designs

2 • Introduction • Programmable gain P DAQ/PXI-2204: x1, x2, x4, x5, x8, x10, x20, x40, x50, x200. P DAQ/PXI-2205/2206: x1, x2, x4, x8. • A/

Introduction • 3 1.2 Applications • Automotive Testing • Cable Testing • Transient signal measurement • ATE • Laboratory Automation • Biotech

4 • Introduction • Programmable input range: Device Bipolar input range Unipolar input range ±10V -- ±5V 0~10V ±2.5V 0~5V ±2V 0~4V ±1.25V 0~2.5V ±

Introduction • 5 • -3dB small signal bandwidth: (Typical, 25°C) Device Input range Bandwidth (-3dB) ±10V ±5V ±2.5V ±1.25V -- 0~10V 0~5V 0~2.5V 2000

6 • Introduction • System Noise (LSBrms, including Quantization, Typical, 25°C) Device Input Range System Noise Input Range System Noise ±10V 0.95 L

Introduction • 7 • Settling time to full-scale step: (Typical, 25°C) Device Input Range Condition Settling time ±10V ±5V 0~10V ±2.5V 0~5V ±2V 0~4V

Copyright 2002 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 1.13: Oct 15, 2002 Part No: 50-11213-101 The information in this document is

8 • Introduction • Time-base source: Internal 40MHz or External clock Input (fmax: 40MHz, fmin: 1MHz, 50% duty cycle) • Trigger modes: post-trigge

Introduction • 9 • Output range: ±10V, 0~10V, ±AOEXTREF, 0~AOEXTREF • Settling time: 3µS to 0.5LSB accuracy • Slew rate: 20V/uS • Output coupling

10 • Introduction • Synchronous Digital Inputs (SDI): For DAQ/PXI-2204 only • Number of channels: 4 digital inputs sampled simultaneously with the

Introduction • 11 ♦ Digital Trigger (D.Trig) • Compatibility: TTL/CMOS • Response: Rising or falling edge • Pulse Width: 10ns min ♦ System Synch

12 • Introduction 1.4 Software Support ADLINK provides versatile software drivers and packages for users’ dif-ferent approach to building up a syste

Introduction • 13 1.4.3 PCIS-OCX: ActiveX Controls We suggest customers who are familiar with ActiveX controls and VB/VC++ programming use PCIS-OCX

14 • Installation 2 Installation This chapter describes how to install the DAQ/PXI-22XX. The contents of the package and unpacking information that y

Installation • 15 2.2 Unpacking Your DAQ/PXI-22XX SERIES card contains electro-static sensitive com-ponents that can be easily be damaged by static

16 • Installation Figure 2: PCB Layout of PXI-22XX 2.4 PCI Configuration 1. Plug and Play: As a plug and play component, the card requests an

Signal Connections • 17 3 Signal Connections This chapter describes the connectors of the DAQ/PXI-22XX, and the signal connection between the DAQ/PXI

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18 • Signal Connections AI0 (AIH0) 1 35 (AIL0) AI32 AI1 (AIH1) 2 36 (AIL1) AI33 AI2 (AIH2) 3 37 (AIL2) AI34 AI3 (AIH3) 4 38

Signal Connections • 19 DA0OUT 1 35 AOGND DA1OUT 2 36 AOGND AOEXTREF 3 37 AOGND NC 4 38 NC DGND 5 39 DGND EXTWFTRIG 6 40 DGND EXTDTRIG 7

20 • Signal Connections Legend: Signal Name Reference Direction Description AIGND -------- -------- Analog ground for AI. All three ground referen

Signal Connections • 21 3.2 Analog Input Signal Connection The DAQ/PXI-22XX provides up to 64 single-ended or 32 differential analog input channels.

22 • Signal Connections Referenced Single-ended (RSE) Mode In referenced single-ended mode, all the input signals are connected to the ground provide

Signal Connections • 23 resistor at each channel to provide a bias return path. The resistor value should be about 100 times the equivalent source im

24 • Operation Theory 4 Operation Theory The operation theory of the functions on the DAQ/PXI-22XX is described in this chapter. The functions inclu

Operation Theory • 25 4.1.1 DAQ/PXI-2204 AI Data Format 4.1.1.1 Synchronous Digital Inputs (for DAQ/PXI-2204 only) When each AD conversion is compl

26 • Operation Theory Table 8 and 9 illustrate the ideal transfer characteristics of some input ranges. Description Bipolar Analog Input Range Dig

Operation Theory • 27 4.1.2 DAQ/PXI-2205/2206 AI Data Format The data format of the acquired 16-bit A/D data is 2’s Complement coding. Table 10 and

28 • Operation Theory 4.1.3 Software conversion with polling data transfer acquisition mode (Software Polling) This is the easiest way to acquire a

Operation Theory • 29 4.1.4 Programmable scan acquisition mode 4.1.4.1 Scan Timing and Procedure It's recommended that this mode be used if yo

30 • Operation Theory 2. The SI_counter is a 24-bit counter and the SI2_counter is a 16-bit counter. Therefore, the maximum scan interval using the

Operation Theory • 31 Scan with SSH You can send the SSHOUT signal on CN2 to an external S&H circuits to sample and hold all signals if you want

32 • Operation Theory 4.1.4.3 Trigger Modes DAQ/PXI-22XX provides 3 trigger sources (internal software, external analog and digital trigger sources)

Operation Theory • 33 Note that if a trigger event occurs when a scan is in progress, the data acquisition won’t stop until the scan completes, and t

34 • Operation Theory Acquisition_in_progress Scan_start AD_conversion Scan_in_progress (SSHOUT)(pin8 on CN2) (M_Counter = M = 3, NumChan_Counter

Operation Theory • 35 Middle-Trigger Acquisition Use middle-trigger acquisition in applications where you want to collect data before and after a tri

36 • Operation Theory (M_Counter=M=2, NumChan_Counter=4, PSC_Counter=N=2) Acquisition_in_progress Scan_start AD_conversion Scan_in_progress (SS

Operation Theory • 37 Delay Trigger Acquisition Use delay trigger acquisition in applications where you want to delay the data collecting process aft

Table of Contents • i Table of Contents Tables...iv Figures ...

38 • Operation Theory data. The process repeats until the specified amount of re-trigger signals are detected. The total acquired data length = NumCh

Operation Theory • 39 of conversion into their specified counters. After the AD trigger condition is matched, the data will be transferred to the sys

40 • Operation Theory 4.2 D/A Conversion There are 2 channels of 12-bit D/A output available in the DAQ/PXI-22XX. When using D/A converters, users s

Operation Theory • 41 The D/A conversion is initiated by a trigger source. Users must decide how to trigger the D/A conversion. The data output will

42 • Operation Theory (UC _Counter=4, IC_Counter=3) 4 update counts, 3 iterations DAWR WFG_in_progress DA update_interval t= UI_Counter/Timebas

Operation Theory • 43 4.2.2.1 Trigger Modes Post-Trigger Generation Use post trigger when you want to perform DA waveform right after a trigger eve

44 • Operation Theory (UC _Counter=8, IC_Counter=1) 8 update counts, 1 iteration DAWR WFG_in_progress Operation start Trigger Output Waveform

Operation Theory • 45 4.2.2.2 Iterative Waveform Generation Set IC_Counter in order to generate iterative waveforms from the data of a single wavef

46 • Operation Theory (UC _Counter=4, IC_Counter=3) 4 update counts, infinite iterations DAWR WFG_in_progress Operation start Trigger Output

Operation Theory • 47 In stop mode III, after a software stop command is given, the waveform generation won’t stop until the performed number of wave

ii • Table of Contents Chapter 4 Operation Theory ...24 4.1 A/D Conversion...

48 • Operation Theory (UC _Counter=4, IC_Counter=3) 4 update counts, infinite iterations DAWR WFG_in_progress Operation start Trigger Output Wav

Operation Theory • 49 4.4 General Purpose Timer/Counter Operation Two independent 16-bit up/down timer/counter are designed within FPGA for various

50 • Operation Theory 4.4.2.1 Mode1: Simple Gated-Event Counting In this mode, the counter counts the number of pulses on the GPTC_CLK after the sof

Operation Theory • 51 4.4.2.3 Mode 3: Single Pulse-width Measurement In this mode the counter counts the pulse-width of the signal on GPTC_GATE in t

52 • Operation Theory 4.4.2.5 Mode5: Single Triggered Pulse Generation This function generates a single pulse with programmable delay and pro-gramma

Operation Theory • 53 4.4.2.7 Mode7: Single Triggered Continuous Pulse Generation This mode is similar to mode5 except that the counter generates co

54 • Operation Theory 4.5 Trigger Sources We provide flexible trigger selections in the DAQ/PXI-22XXseries products. In addition to the internal sof

Operation Theory • 55 Trigger Level digital setting Trigger voltage 0xFF 9.92V 0xFE 9.84V --- --- 0x81 0.08V 0x80 0 0x7F -0.08V --- --- 0x01

56 • Operation Theory 4.5.2.2 Above-High analog trigger condition Figure 41 shows the above-high analog trigger condition, the trigger signal is gen

Operation Theory • 57 4.5.2.4 High-Hysteresis analog trigger condition Figure 43 shows the high-hysteresis analog trigger condition, the trigger sig

Table of Contents • iii 4.5 Trigger Sources... 54 4.5.1 Software -Trigger...

58 • Operation Theory 4.5.3 External Digital Trigger An external digital trigger occurs when a rising edge or a falling edge is detected on the digi

Operation Theory • 59 4.6 User-controllable Timing Signals In order to meet the requirements for user-specific timing and the re-quirements for sync

60 • Operation Theory 4.6.1 DAQ timing signals The user-controllable DAQ timing-signals contains: (Please refer to 4.1.4.1 for the internal timing s

Operation Theory • 61 Summary of the auxiliary function input signals and the corresponding functionalities Category Timing signal Functionality Co

62 • Operation Theory EXTDTRIG and EXTWFTRIG EXTDTRIG and EXTWFTRIG are dedicated digital trigger input signals for A/D and D/A operations respective

Operation Theory • 63 AFI[1] Regarding the D/A operations, users could directly input the external D/A update signal to replace the internal DAWR sig

64 • Operation Theory In PCI form factor, there is a connector on the top right corner of the card for the SSI. Refer to section 2.3 for the connecto

Operation Theory • 65 When the digital trigger condition of Card 1 occurs, Card 1 will internally generate the ADCONV signal and output this ADCONV s

66 • Calibration 5 Calibration This chapter introduces the calibration process to minimize AD meas-urement errors and DA output errors. 5.1 Loading

Calibration • 67 5.2 Auto-calibration By using the auto-calibration feature of the DAQ/PXI-22XX, the calibration software can measure and correct al

iv • Tables Tables Table 1: Programmable input range...4 Table 2: -3dB small signal bandwidth ...

68 • Warranty Policy Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please

Warranty Policy • 69 5. To ensure the speed and quality of product repair, please download an RMA application form from our company website www.adli

Figures • v Figures Figure 1: PCB Layout of DAQ-22XX......... 15 Figure 2: PCB Layout of PXI-22XX.......